MFS1S00-HxxxV 200Gb/s QSFP56 MMF AOC Product Specifications

Introduction

The NVIDIA® MFS1S00 is a QSFP56 VCSEL-based (Vertical Cavity Surface-Emitting Laser) active optical cable (AOC) designed for use in 200Gb/s InfiniBand (IB) HDR (High Data Rate) systems.

The MFS1S00 AOC offers high port density and configurability, and a much longer reach than passive copper cables in the data centers. Since the AOC is hot pluggable, it is easy to install and replace.

The MFS1S00 has a standard SFF-8665 compliant QSFP56 port on the electrical side towards the host system. It contains four multi-mode fibers (MMF) optic transceivers per end, each operating at data rates of up to 50Gb/s.

The MFS1S00 offers selectable retiming per lane for both its optical transmitters and receivers up to 50Gb/s rates.

NVIDIA's unique quality cable solutions provide power-efficient connectivity for data center interconnects. It enables higher port bandwidth, density and configurability at a low cost, and reduced power requirement in the data centers. Rigorous production testing ensures the best out-of-the-box installation experience, performance and durability.

Ordering Information

Absolute Maximum Specifications

Absolute maximum ratings are those beyond which damage to the device may occur.

Prolonged operation between the operational specifications and absolute maximum ratings is not intended and may cause permanent device degradation.

Environmental Specifications

This table shows the environmental specifications for the product.

Operational Specifications

This section shows the range of values for normal operation. The host board power supply filtering should be designed as recommended in the SFF Committee Spec.

1. Internal temperature readout through DDMI of up to 75°C is allowed.

Electrical Specifications

Notes:

• Multiple clock domains are supported only on line-side Rx. Host side Rx supports a single clock domain only.
• QSFP Tx CDR lock can only occur if Tx lane 1 is transmitting data
• Interoperability

For configurations tested with the AOCs, please refer to the system level product (SLP) qualification report.

Rate Select

The AOC supports rate select, which is controlled by writing to registers 0x57-0x58. Two bits are assigned for each receiver lane in byte 0x57 (87dec, Rxn_Rate_Select) and two bits for each transmitter lane in byte 0x58 (88dec, Txn_Rate_Select) to specify up to four bitrates, as defined in SFF-8636 Rev 2.9.2 Table 6-5 XN_RATE_SELECT ENCODINGS. All four lanes are required to have the same rate select value.

The below table specifies the rate for each rate select setting.

Rate Select Encodings

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